In the area of integrated circuits, there is a so-called wafer-level package, also called a chip-scale package, as a new packaging form in which a separate, additional packaging is not used, but rather solder balls are placed directly onto a silicon chip. This special packaging form is particularly space-saving. The measurement of low resistances of components, for example, transistors, in integrated circuits in the wafer-level package is of special importance in ensuring functionality and quality during product testing. To ensure the parameters guaranteed in the data sheet, values must thereby be measured in the order of magnitude of approximately 100 mΩ. This requirement appears frequently in circuits in which large currents flow and small losses are important, for example, in the areas of electricity supply, also called power management, or audio. The contacts which produce the link between the terminals of a component and a measuring device during a product test, for example, needle-shaped probes, as a rule have a far higher contact resistance than does the actual component to be measured. Moreover, it is not the pure resistance of the component in silicon that is important to a user, but rather the total value of the resistance of a terminal of the component to the other terminal. Thus, the parasitic fractions of the packaging, or of the package, have to be taken into consideration. Because of the great variation in these contact resistances caused in production, it is not possible to account for the parasitic fractions with a constant correction. The four-wire measurement usually used, also known as the Kelvin measurement, has serious problems in the area of wafer-level packages as a result of the particularly small contacts.